Back in some part of the olden days (quoting from an original 11/45 Small Computer Handbook), there was a memory parity register for each 8KW of memory. These registers had the following addresses:

        772110          memory 0-8K
        772112          memory 8-16K
         . . .
        772144          memory 112-120K
        772146          memory 120-124K

These registers had the following bit definitions:

        <15>    Parity Error
        <11,10> Type of parity <11> controls high 4K, <10> low 4K
                                =1 odd parity, =0 even
        <9>     Halt Enable <9> =1, halt on parity error, =0 trap to 4
        <8>     Parity Disable <8> =1, no action on parity error

Initial state on power-up <15> =0, <11-8> =1

This is vintage 11/45, when the parity registers were part of the CPU.

Later Unibus 11's had parity registers as part of the memory units, one register for each core block, 8KW or 16KW or 32KW. As I recall, operating systems and diagnostic software expected the parity register addresses to be jumpered for consecutive I/O page words regardless of the original intended assignments.

Explanation provided by Carl Lowenstein

An alternative view by Dmitry Pryanishnikov:

Hm... This info seems to be incompatible with the current software. Look at HWDDF$ in RSX-11M/PLUS EXEMC.MLB: MPAR=172100. So we have up to 16 registers at addresses 172100-172136 (for example, built-in 256k memory in CM2420 has CSR @ 172100 while external memory CM3508.31 (up to 4Mb) has CSR @ 172136). Then look at [11,10]PARTY.MAC: those registers must not have consecutive I/O page addresses, RSX builds array of it's addresses during boot, so every array element points either to I/O page for existent CSR or to dummy word in memory for non-existent (there is also a bitmask of present CSRs for error logging purposes). Looking at PARTY code one can see that only bit 0 defined in those registers, and setting it will enable parity error notification (so RSX writes #1 to each one). Other bits may differ on different memory modules. During memory parity/uncorrectable ECC error memory module asserts BUS PB L UNIBUS signal thus causing current instruction abort thru vector 114(8). If it was in kernel mode, RSX prints ***EXEC PARITY ERROR STOP*** and halts. Otherwise it aborts current task and logs contents of parity registers for Error Logging.

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